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Designing Authentic VR Learning for Microelectronics with the TAPPA Process

Sat, April 11, 11:45am to 1:15pm PDT (11:45am to 1:15pm PDT), JW Marriott Los Angeles L.A. LIVE, Floor: Ground Floor, Gold 4

Abstract

This presentation shares the design of a virtual reality (VR) instructional intervention developed to teach essential skills in microelectronics physical assurance, a domain where physical lab access is limited by cost and safety. Using the TAPPA Process (Moore, 2016) as a structured, iterative design approach, the project engaged engineering students in co-design to identify instructional barriers and shape a VR prototype with AI-guided support. Preliminary findings underscore the value of repeatable, low-pressure environments that foster procedural fluency and learner control. This study contributes to instructional design and technology literature by demonstrating how participatory design can generate immersive, authentic learning experiences that align with the demands of the evolving skills economy.

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